1. Field of the Invention
This invention relates to transistors, and more particularly to two-stage transistor gain cells and cascode amplifiers.
2. Description of the Related Art
A cascode cell, alternatively referred to as a “single gain stage amplifier” or, “two-transistor gain stage amplifier” or a cell having “two-transistor gain”, or “two stages of gain,” typically includes two transistors with the same current going through each. Cascode cells are advantageous for amplification of signals because they may provide relatively high-bandwidth, high gain, and good output isolation in comparison to a single transistor amplifier stage. When the cascode cell is manufactured using heterojunction bipolar transistor (HBT) technology configured with a common-emitter transistor and common-base transistor, current (IC) is shared through both transistors thus requiring appropriate voltage bias to be applied to each transistor. Commonly, ground potential is zero volts (V) and is applied to the emitter node of the common-emitter transistor.
Unfortunately, reactive parasitics at the base node of a common-base device rapidly degrade the stability margin of the cascode cell below that desired to prevent unintended instabilities with presented impedances. A need continues to exist to provide for greater stability, higher gain, and output power.